What is an LVDS signal

LCD driver board output of digital signals, in addition to including RGB data signal, also includes line synchronization, field synchronization, pixel clock and other signals, the highest frequency of the pixel clock signal can exceed 28MHz. With THE TTL interface, the data transmission rate is not high, the transmission distance is short, and the anti-EMI capability is poor, which will affect the RGB data to some extent. In addition, THE TTL multi-channel data signal is transmitted by the way of the line, the number of the whole line up to dozens of roads, not only inconvenient connection, but also not suitable for the trend of ultra-thin. Using LVDS output interface to transmit data, these problems can be solved, and the data can be transmitted with high rate, low noise, long distance and high accuracy.

1 interface

So, what is the LVDS output interface? LVDS, or Low Voltage Differential Signaling, is a Low Voltage Differential signal technology interface. It is a kind of digital video signal transmission method developed by NS company in order to overcome the disadvantages of high power consumption and EMI electromagnetic interference when TTL level is used to transmit broadband data with high bit rate.

LVDS output interface utilizes very low voltage swing (about 350mV) to transmit data through differential between two PCB routes or a pair of balanced cables, i.e. low voltage differential signal transmission. LVDS output interface can make the signal transfer rate of several hundred Mbit/s on the differential PCB line or balanced cable. Because of the low voltage and low current driving mode, low noise and low power consumption are realized. LVDS output interface is widely used in 17 "and above LCD display.

2 compose

In the LIQUID crystal display, THE LVDS interface circuit includes two parts, namely the LVDS output interface circuit (LVDS transmitter) on the side of the drive board and the LVDS input interface circuit (LVDS receiver) on the side of the LCD panel. LVDS transmitter converts TTL level parallel RGB data signals and control signals output by the main control chip of the driver board into low-voltage serial LVDS signals, and then transmits the signals to the LVDS receiver on the side of the LCD panel through the flexible cable (cable) between the driver board and the LCD panel. The LVDS receiver then converts the serial signal into TTL level parallel signal, which is sent to the LCD screen timing control and row and column drive circuit. Figure 1 shows the schematic diagram of LVDS interface circuit.

In the process of data transmission, clock signal must also be involved. LVDS interface transmits both data and clock in the form of differential signal pair. The so-called signal pair, refers to the LVDS interface circuit, each data transmission channel or clock transmission channel output are two signals (positive output and negative output).

It should be noted that LVDS transmitters on the driver board of different LCDS are not the same. Some LVDS transmitters are one or two independent chips (such as DS90C383), while some are integrated in the main control chip (such as GM5221 has an LVDS transmitter inside).

3 Circuit Types

Like TTL output interfaces, LVDS output interfaces are classified into the following four types:

(l) Single-channel 6-bit LVDS output interface

In this interface circuit, single way transmission is adopted, each base color signal adopts 6 bits of data, a total of 18 bits RGB data, therefore, also known as 18bit or 18bit LVDS interface.

(2) Dual-channel 6-bit LVDS output interface

This interface circuit, the use of dual-channel transmission, each base color signal using 6 bits of data, odd-channel data is 18, even channel data is 18, a total of 36bit RGB data, therefore, also known as 36bit or 36bit LVDS interface.

(3) Single-channel 8-bit LVDS output interface

In this interface circuit, a single way of transmission is adopted, and each base color signal adopts 8 bits of data, a total of 24 bits of RGB data, so it is also called 24bit or 24bit LVDS interface.

(4) Dual-channel 8-bit LVDS output bit interface

This interface circuit, the use of dual-channel transmission, each base color signal using 8-bit data, odd-channel data is 24, even data is 24, a total of 48bit RGB data, therefore, also known as 48-bit or 48bit LVDS interface

4 Chip Introduction

Typical LVDS sending chip is divided into four channels, five channels and ten channels, the following brief introduction.

(1) Four-channel LVDS sending chip

Figure 2 shows the internal block diagram of the four-channel LVDS transmitter chip (DS90C365). Contains three data signal channels (including RGB, data enable DE, line synchronization signal HS, field synchronization signal VS) and a clock signal transmission channel.

The 4 channel LVDS transmitter chip is mainly used to drive the 6bit LCD panel. Using a four-channel LVDS transmitter chip, a single-channel 6bit LVDS self connection circuit and a odd-even dual-channel 6bit LVDS interface circuit can be formed.

(2) Five-channel LVDS sending chip

FIG. 3 shows the internal block diagram of a five-channel LVDS transmitter chip (DS90C385). Contains four data signal channels (including RGB, data enable DE, line synchronization signal HS, field synchronization signal VS) and a clock signal transmission channel.

The five-channel LVDS transmitter chip is mainly used to drive the 8bit LCD panel. The five-channel LVDS sending chip is mainly used to form single-channel 8bit LVDS interface circuit and odd-even dual-channel 8bit LVDS interface circuit.

(3) 10-channel LVDS sending chip

FIG. 4 shows the internal block diagram of a 10-channel LVDS transmitter chip (DS90C387). Contains eight data signal channels (including RGB, data enable DE, line synchronization signal HS, field synchronization signal VS) and two clock signal transmission channels.

The 10-channel LVDS transmitter chip is mainly used to drive the 8bit LCD panel. The 10-channel LVDS sending chip is mainly used to form the odd/even dual-channel 8bit LVDS bit interface circuit.

In the ten channels of LVDS sending chip, two clock pulse output channels are set, so that it can adapt to different types of LVDS receiving chip more flexibly. When LVDS receiving circuit also uses a 10-channel LVDS receiving chip, only one channel clock signal can be used; When the LVDS receiving circuit uses two five-channel LVDS receiving chips, the ten-channel LVDS sending chip needs to provide a separate clock signal for each LVDS receiving chip.

5 Signal Transmission

The input

The input signal of LVDS transmitting chip comes from the main control chip, and the input signal includes RGB data signal, clock signal and control signal.

(1) Data signal: for the convenience of illustration, RGB signal, data gate DE and line field synchronization signal are counted as data signal.

In the four-channel LVDS transmitting chip used by the 6-bit LCD panel, there are eighteen RGB signal input pins, namely, six R0 ~ R5 red base data (6bit red base data, R0 is the lowest significant bit, R5 is the most significant bit), six G0 ~ G5 green base data, six B0 ~ B5 blue base data; A display data enable signal DE (data valid signal) input pin; A line synchronization signal HS input pin; A field synchronization signal VS input pin. In other words, there are 21 data signal input pins in the four-channel LVDS transmitter chip.

In the five-channel LVDS transmitting chip used by the 8-bit LCD panel, there are twenty-four RGB signal input pins, respectively, eight red primary data R0 ~ R7 (8bit red primary data, R0 is the lowest significant bit, R7 is the most significant bit), eight green primary data G0 ~ G7, eight blue primary data B0 ~ B7; A valid display data enable signal DE (data valid signal) input pin; A line synchronization signal HS input pin; A field synchronization signal VS input pin; One input pin for each use. In other words, there are 28 data signal input pins in the five-channel LVDS transmitter chip.

It should be noted that the INPUT signal of the LCD panel must have DE signal, but some LCD panels only use a single DE signal and do not use line field synchronization signal. Therefore, when applied to different LCD panels, some LVDS sending chips may only need to input DE signal, while others need to input DE and line field synchronization signal at the same time.

(2) Input clock signal: that is, pixel clock signal, also known as data shift clock (in LVDS sending chip, the input parallel RGB data into serial data to use the shift register). The pixel clock signal is the benchmark for transmitting and reading data signals.

(3) Standby control signal (POWER DOWN) : When this signal is effective (generally at low voltage), will turn off the POWER supply of THE CLOCK PLL PLL circuit in LVDS sending chip, stop the OUTPUT of IC.

(4) Data sampling point selection signal: used to choose to use the rising or falling edge of the clock pulse to read the input RGB data. Some LVDS sending chips may not set the standby control signal and data sampling point selection signal, but some other control signals are set in addition to the above two control signals.

The output

The LVDS transmitting chip converts the TTL level RGB data signals input in parallel mode into serial LVDS signals, which are directly sent to the LVDS receiving chip on the SIDE of the LCD panel.

The output of LVDS transmitter chip is a low swing differential pair signal, which generally consists of one channel clock signal and several channels serial data signal. Because LVDS sending chip is output in the form of differential signal, therefore, the output signal is two lines, one line output positive signal, the other line output negative signal.

(1) Clock signal output: the frequency of the clock signal output by LVDS sending chip is the same as the frequency of the input clock signal (pixel clock signal). The output of the clock signal is often expressed as: TXCLK+ and TXCLK-, and the clock signal occupies a channel of the LVDS sending chip.

②LVDS serial data signal output: for four channels LVDS sending chip, serial data occupy three channels, the data output signal is often expressed as TXOUT0+, TXOUT0-, TXOUT1+, TXOUT1-, TXOUT2+, TXOUT2-.

For the five-channel LVDS sending chip, serial data occupy four channels, the data output signal is often expressed as TXOUT0+, TXOUT0-, TXOUT1+, TXOUTI-, TXOUT2+, TXOUT2-, TXOUT3+, TXOUT3-.

For ten channels LVDS sending chip, serial data occupy eight channels, the data output signal is often expressed as TXOUT0+, TXOUT0-, TXOUT1+, TXOUT1-, TXOUT2+, TXOUT2-, TXOUT3+, TXOUT3-, TXOUT4+, TXOUT4-, TXOUT1-, TXOUT2-, TXOUT3+, TXOUT3-, TXOUT4+, TXOUT4-, TXOUT5+, TXOUT5-, TXOUT6+, TXOUT6-, TXOUT7+, TXOLT7-.

If you only look at the circuit diagram, it is not possible to see from the output signals of LVDS sending chip TXOUT-, TXOUT0+ which signal data are contained inside, and how these data are arranged (or what the format of these data is). In fact, the output data of LVDS sending chips produced by different manufacturers may be arranged differently. Therefore, the output data format of the LVDS sending chip on the LCD driver board must be the same as the data format required by the LVDS receiving chip on the LCD panel, otherwise, the driver board and the LCD panel do not match. This is also a problem that must be considered when replacing the LCD panel.

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                                                                                   ---------Justin chen 2021/07/20